Optimizing polycrystalline silicon for energy-efficient radiofrequency devices with a multiscale simulation approach

Abstract

Increasing demand of applications involving high-frequency devices such as wireless communications exposes limitations, problems, and different sources of signal loss. These issues continue to provide interesting and wide-reaching topics for silicon research, despite it being one of the most researched materials.

The main focus of this work is to investigate silicon substrates on which such devices are built. These devices typically also feature oxide layers to insulate the parts that carry the signal. In higher frequencies (radio frequency devices, RF), we encounter increasing losses in the substrate due to a charge layer forming near the interface of silicon and oxide. One solution to mitigating losses is the introduction of a polycrystalline silicon layer between the silicon substrate and the oxide.

Due to the mismatches of differently oriented grains in the polysilicon, the modeling and investigation of polysilicon is more complicated than single-crystalline silicon. With a set of computational methods, simulations and theoretical modeling, we investigate polysilicon and how the properties of polysilicon can be used to prevent the harmful substrate losses that degrade device performance.

Classical molecular dynamics simulations (LAMMPS) are used to investigate the growth of the polysilicon, with a particular focus on the miscoordinations of the silicon atoms at the grain boundaries. Ab initio quantum mechanical calculations (VASP) connect structural miscoordinations with resulting electronic properties. An iterative Poisson solver is developed and used together with theoretical modeling of polysilicon resistivity to investigate the oxide-(poly)silicon interface. An extension for existing resistivity models is developed to examine the effect of grain size distributions on polysilicon resistivity. Finally, device simulations are used to investigate the loss behavior of different polysilicon films. These different methods form a linked simulation chain, where the results of the previous link provides input for the next step starting from the atomic scale all the way to the device level.