2.4GHz RF Front-end Module Based on 0.18μm CMOS Process

Abstract

With the increasing number of wireless communication applications, the demand for low-power and low-cost radio frequency (RF) wireless transceiver chips is increasing. Therefore, the idea of using complementary metal oxide semiconductor (CMOS) technology to design an RF integrated circuit (IC) has begun to receive widespread attention. With CMOS’s rising characteristic frequency, and its low-cost advantages, the use of CMOS technology in RF IC design has gradually replaced the traditional process even the GaAs process. This thesis design an RF front-end module (FEM) chip applied to a wireless local area network (WLAN) system. It is based on Semiconductor Manufacturing International Corporation (SMIC) 0.18μm CMOS process. The circuit of chip mainly includes five parts: low noise amplifier, power amplifier, RF switch, bandgap reference and bias circuit, electro-static discharge (ESD) protection circuit, etc. This thesis through to several classic circuit structure and performance comparison analysis, in view of the low noise amplifier and power amplifier to choose the appropriate circuit structure respectively, through the scan of the transistor parameters and simulation, to obtain minimum noise figure for low noise amplifier and maximum output power for the power amplifier. Then some appropriate input and output matching circuits were designed for the work. In this thesis, the Cadence software is used for circuit design and pre-simulation. Post-simulation results after layout show that: Noise figure of the low noise amplifier is 3.2dB, the gain is 13.5dB, the quiescent current is 9mA; output P1dB of the power amplifier is 22.5dBm, saturation output power Psat is 23dBm, power added efficiency (PAE) is 28.4%.